1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of manufacturing the same.
2. Related Art
FBC memories are superior to 1T-1C (1 Transistor-1 Capacitor) DRAMs in terms of miniaturization. FBC (Floating Body Cell) memories have attracted attention as semiconductor memory devices in place of 1T-1C DRAMs.
FBC memory cells consist of MISFETs usually formed on SOI substrates. In the FBC, a source region, a drain region, and a body region are formed in an SOI layer. The body region sandwiched between the source and the drain is electrically floating. If the FBC is formed of an N-type FET, the memory cell stores data depending on the amount of holes accumulated in the body region.
If the difference ΔVth between the threshold voltage of a memory cell storing data “0” and the threshold voltage of a memory cell storing data “1” at the time of reading is small, discrimination between the data “0” and the data “1” is difficult and the number of fail bits can be increased. One of causes of small ΔVth is that the surface of a supporting substrate is depleted and the capacitance Csub between the body and the supporting substrate is decreased.
Memory cells share sources or drains with adjacent memory cells. In conventional FBCs, holes of selected memory cells flow into adjacent non-selected memory cells, so that erroneous data is programmed in the non-selected memory cells. For example, if 1.5V is applied to the gate of a selected memory cell and 2.2V is applied to the drain, impact ionization occurs in the vicinity of a PN junction between the drain and the body region. Holes are accumulated in the body region of the selected memory cell and data “1” is programmed. When the data “1” is written, a part of the holes diffuses toward the source to flow into the body region of a non-selected memory cell next to the selected memory cell. The data “1” can be programmed by mistake in the body region of the non-selected memory cell. The holes of the selected memory cell may flow via the drain into the non-selected memory cell. This is called “bipolar disturb”.
If adjacent memory cells do not share drains or sources, the aforementioned problems do not occur, though the cell size may be significantly increased.
SOI substrates are about ten times as expensive as ordinary bulk substrates. Conventional FBCs formed on SOI substrates cost more than DRAMs formed on bulk substrates.